Disastrous societal, social and economical consequences could show up if confidential data stored in secure circuits (NFC circuits, smart meters, banking cards…) become easily accessible by badly intentioned people. Several techniques, based on the observation, the perturbation or the inspection of such devices have already been used for attacking those devices. These attacks are generally realized with a two step approach. The first one consists in identifying critical functions within a transaction (time domain) and the position of these functions in the circuit (spatial domain). During the second phase, the attacker gather its mean over these functions, for instance to extract secrets or deactivate protections. The first phase, also called reverse-engineering phase, is critical for the attacker as it determines the efficiency to extract the secret in the second phase.
Currently, reverse-engineering techniques are mostly based on the circuit visual inspection. Recently, more affordable techniques that also give timing information have been proposed and validated on test circuits. In the near future, the combination of several techniques, giving various spatial and timing resolutions, would lead to a multi-scale reverse-engineering. This approach will decrease the cost and the time of the reverse engineering step, significantly reducing the component security.
This is absolutely urgent that secure circuits manufacturers propose and validate efficient hardware and software protection against the multi-scale reverse-engineering techniques with a cost compatible with the targeted products. PANDORE’s consortium will include a small company, a major company and two academic laboratories. Each partner has recognized expertise in secure circuit and product design and has access to state of the art equipments to validate the proposed solutions.
PANDORE project objective is dual. It has to:
- Quantify precisely the threat linked to multi-scale reverse engineering techniques
- Analyze the efficiency according to this new threat of current protections against reverse engineering and if necessary to purpose new protections
The chosen approach to reach the first goal will consist in setting up multi-scale reverse engineering techniques that seem for us the most promising. With this in mind, we will improve the existing techniques by choosing probes and sensors more successful but also by proposing signal and image processing algorithms perfectly adapted. Data fusion (images and signals) obtained at different resolutions will be necessary to set-up the reverse engineering that we propose. This is a technical challenge already identified that will have to be unlocked. Indeed the data fusion necessitates specific repositioning methods in order to make some correspondences of geometrical and/or radiometric pattern at different spatial and temporal scales. Finally, to estimate the threat of these new techniques, it will be necessary to set them up over prototype and commercial circuits and then to quantify the obtained gain in spatial and temporal resolution.
To reach the second objective, it would be necessary to implement on prototype circuits current or in study protections against reverse engineering and to submit them to multi-scale techniques. According the obtained resistance, improvements of these protections will have to be purposed. This technological challenge is also very difficult to break as protections that are contemplated will have to be implemented on circuits produced in a large number (i.e. billions of units per year). We won’t tackle, in particular, costly protections contemplated to protect military systems (such as technologic library camouflaging, Sishell type encapsulation, Gore coating, reconfigurable logic, etc.) It is a matter of suggesting innovative and very low cost (few cents) protections against the full range of reverse-engineering techniques (that cost in the other hand, several tens of thousands euros).